John Cocke (*1925) via ACM A.M. Turing Award website, http://amturing.acm.org/award_winners/cocke_2083115.cfm
On May 30, 1925, American computer scientist John Cocke was born. Cocke is recognized for his large contribution to computer architecture and optimizing compiler design. He is considered by many to be “the father of RISC computer architecture.”
John Cocke – Background Information
John Cocke was born in Charlotte, North Carolina. His father Norman was the president of Duke Power Company and a member of the Board of Trustees of Duke University. Naturally, he attended Duke University, where Cocke received his Bachelor’s degree in Mechanical Engineering in 1946 and his Ph.D. in Mathematics in 1956. After graduation he joined IBM and worked at the T.J. Watson Research Center until his retirement 37 years later.
High Performance Computers
John Cocke made fundamental contributions to the architecture of high performance computers and to the design of optimizing compilers. Perhaps the project where his innovations were most noted was in the IBM 801 minicomputer, a telecom computer named after the building in which his team worked, where Cocke’s realization that matching the design of the architecture’s instruction set to the relatively simple instructions actually emitted by compilers could allow high performance at a low cost. The 801 design philosophy was based on a tight coupling between – and simultaneous development of — the hardware and the compiler. The resulting architecture was unlike the then common practice of having many complex instructions built into the hardware. The earlier IBM 7030 “Stretch” computer for example had 735 different instructions, including instructions for variable-length operands. Such a rich set of hardware operations proved useful for special programming situations, but the designers of high level language compilers found it very difficult to use them in creating compiled code.
Reduced Instruction Set Computing – RISC
Cocke decided instead to design the 801 with a small set of basic instructions optimized for use by compilers, which resulted in a simpler but faster machine. The 801 inspired several research projects, including new ones at IBM that would eventually lead to the IBM POWER instruction set architecture. The term RISC, short for Reduced instruction set computing, was first coined by David Patterson of the Berkeley RISC project, although somewhat similar concepts had appeared before. Berkeley RISC was based on gaining performance through the use of pipelining and an aggressive use of a technique known as register windowing. In a traditional CPU, one has a small number of registers, and a program can use any register at any time. In a CPU with register windows, there are a huge number of registers, e.g. 128, but programs can only use a small number of them, e.g. eight, at any one time. A program that limits itself to eight registers per procedure can make very fast procedure calls: The call simply moves the window “down” by eight, to the set of eight registers used by that procedure, and the return moves the window back.
The RISC-1 Processor
The Berkeley RISC project delivered the RISC-I processor in 1982. Consisting of only 44,420 transistors, RISC-I had only 32 instructions, and yet completely outperformed any other single-chip design. The other early RISC design by Stanford University led to the MIPS architecture, which grew out of a graduate course by John L. Hennessy in 1981. The MIPS approach emphasized an aggressive clock cycle and the use of the pipeline, making sure it could be run as “full” as possible.
RISC Optimizing Compiler
Critical to the success of RISC was an optimizing compiler able to use the reduced instruction set efficiently. Cocke co-developed interval analysis with Frances Allen, a program analysis technique based on a control flow graph reduction. Moreover, Cocke co-invented many of the optimizing transformations underlying today’s compilers, including efficient range checking for arrays, global common subexpression elimination, code motion, operator strength reduction, constant propagation, dead code elimination, and instruction scheduling.
Further Achievements
Cocke is also one of the inventors of the CYK algorithm (C for Cocke), a parsing algorithm for context-free grammars. He was also involved in the pioneering speech recognition and machine translation work at IBM in the 1970s and 1980s, and is credited by Frederick Jelinek with originating the idea of using a trigram language model for speech recognition. IBM recognized Cocke’s many accomplishments by making him an IBM Fellow in 1972. In 1987, he was awarded the ACM Turing Award, the highest recognition in computer science. John Cocke passed away in July 16, 2002, in Valhalla, New York, at age 77.
PA-RISC Design Issues, lecture by Michael Mahon, [7]
References and Further Reading:
- [1] John Cocke, at ACM A. M. Turing Award Winners
- [2] John Cocke at Computer History Museum
- [3] John Cocke at The History of Computing Project
- [4] IBM Fellow John Cocke passed away on July 16th, Obituary, IBM (2002)
- [5] “RISC vs. CISC”. RISC Architecture. Stanford University. 2000.
- [6] “What is RISC”. RISC Architecture. Stanford University. 2000.
- [7] PA-RISC Design Issues, lecture by Michael Mahon, Computer History Museum @ youtube
- [8] John Cocke at Wikidata
- [9] Schofield, Jack (2002-07-27). “John Cocke”. The Guardian. Guardian Media Group.
- [10] Cocke, John; Markstein, Victoria (January 1990). “The evolution of RISC technology at IBM”. IBM Journal of Research and Development. 34 (1): 4–11.
- [11] Timeline of Turing Award Laureates, via Wikidata
